YL KL26Z V2 开发板原理图

YL-KL26Z-V2 开发板原理图

5

4

3

2

1

USB 5V --> 3.3V P5V_SDA U1 LM1117-3.3 3 C1 10uF GND GND GND VIN OUT TAB 2 4 D1 C2 10uF GND GND 8 GND+5V P5V_SDA D2 J1 CONN USB MINI-B 1 2 3 4 5 GND 7 9 GND TP3 TP4 RST_TGTMCU 19 GND+5V C

3V3 SS14 SMA 3V3 U2

1

1 C3 10uF 7

VDD1

D

D

VDDA 3V3 VSSA JTAG_TCLK/SWD_CLK/EZP_CLK/TSI0_CH1/PTA0/UART0_CTS/UART0_COL/FTM0_CH5 JTAG_TDI/EZP_DI/TSI0_CH2/PTA1/UART0_RX/FTM0_CH6 JTAG_TDO/TRACE_SWO/EZP_DO/TSI0_CH3/PTA2/UART0_TX/FTM0_CH7 JTAG_TMS/SWD_DIO/TSI0_CH4/PTA3/UART0_RTS/FTM0_CH0 NMI/EZP_CS/TSI0_CH5/PTA4/FTM0_CH1 12 13 14 15 16 SDA_JTAG_TCLK SDA_JTAG_TDI SDA_JTAG_TDO SDA_JTAG_TMS

R1 10K

TP1 SS14 SMA+5V 11 VBAT

与目标板连接的信号

C4 10uF GND R2 R3 TP2 33 33

6 8

5V

ID

D+

6 5 4 3 C7 2.2UF

EXTAL/PTA18/FTM0_FLT2/FTM_CLKIN0 XTAL/PTA19/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1 VREGIN VOUT33 USB0_DM USB0_DP ADC0_SE8/TSI0_CH0/PTB0/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA ADC0_SE9/TSI0_CH6/PTB1/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB EXTAL32 XTAL32

17 18 4 1 C5 22PF DNP 20 21 GND

Y1 GND2

D-

3 2 GND1

8MHZ XTAL5032 GND

C6 22PF DNP B_RST_TGTMCU 3V3 R4 10K B_RST_TGTMCU<2,3,4>

G

10 9

<2,3,4> UART1_TX_TGTMCU UART1_RX_TGTMCU<2,3,4> 3V3

RESET

2 R5 4.7K SDA_RST R6 10K TP5 GND PU/PD LOGIC: SERIAL INTERFACE IS ALWAYS RESET WHEN USB PORT IS DISCONNECTED GND 33 GND

SDA_SPI0_SCK SDA_SPI0_SOUT SDA_SPI0_SIN 3V3

1 14

VSS1

ADC0_SE15/TSI0_CH14/PTC1/SPI0_PCS3/UART1_RTS/FTM0_CH0/I2S0_TXD0 ADC0_SE4B/CMP1_IN0/TSI0_CH15/PTC2/SPI0_PCS2/UART1_CTS/FTM0_CH1/I2S0_TX_FS CMP1_IN1/PTC3/SPI0_PCS1/UART1_RX/FTM0_CH2/CLKOUT/I2S0_TX_BCLK PTC4/SPI0_PCS0/UART1_TX/FTM0_CH3/CMP1_OUT PTC5/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/CMP0_OUT CMP0_IN0/PTC6/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/I2S0_MCLK CMP0_IN1/PTC7/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS

22 23 24 25 26 27 28

SDA_SPI0_RST_B SDA_SPI0_CS VCC 2 GND U3A 74LVC125ADB 7 3 SWD_DIO_TGTMCU<2,3,4>

C

EPAD 1

GND 8 D3 LED-GREEN 29 30 31 32 TP6

10 9 U3C 74LVC125ADB 12 13

R7 220R

PTD4/SPI0_PCS1/UART0_RTS/FTM0_CH4/EWM_IN ADC0_SE6B/PTD5/SPI0_PCS2/UART0_CTS/UART0_COL/FTM0_CH5/EWM_OUT ADC0_SE7b/PTD6/SPI0_PCS3/UART0_RX/FTM0_CH6/FTM0_FLT0 PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1

2

11

SWD_CLK_TGTMCU<2,3,4>

R8 0R

KL25Z Pin PTC1/LLWU_P6/RTC_CLKIN

U3D 74LVC125ADB SDA_A5<2,4>

PK20DX128VFM5

SDA_PTD5

TP7

B

TARGET RESET AND BOOTLOADER PUSH BUTTON 3V3 R9 10K RST_TGTMCU C8 1uF/NC GND GND 1 2 3 4

SDA INTERFACE K1 6X6

+5V+5V R10 4.7K TP8 R11 10K 3V3 3V3+5V

B

GND GND GND

SPARE 74HC125 buffer

SPI FLASH MEMORY U4 SDA_SPI0_SOUT SDA_SPI0_SCK GND 1 2 3 4 SI SCK SO RSET_B WP_B CS_B GND VCC 6 8 5 7 GND SDA_SPI0_SIN 3V3 3V3

K20 JTAG CONNECTOR 3V3 R12 10K 3V3 1 3 5 7 9 J2 2 4 6 8 10 HDR-2X5/NC 1.27MM_2X5 GND SDA_JTAG_TMS SDA_JTAG_TCLK SDA_JTAG_TDO SDA_JTAG_TDI SDA_RST

SWD CONNECTOR 3V3

R13 10K 3V3 1 3 5 7 9 J3 2 4 6 8 10 HDR-2X5 1.27MM_2X5 GND SWD_DIO_TGTMCU SWD_CLK_TGTMCU UART1_RX_TGTMCU UART1_TX_TGTMCU RST_TGTMCU A

4

SDA_SPI0_RST_B SDA_SPI0_CS 6 U3B 74LVC125ADB B_RST_TGTMCU

RST_TGTMCU

5

A

SUBASSEMBLY_S08 DNP AT45DB161D-S OR AT45DB161E-SSHD

R14

10K

3V3

Title Size C Date: 5 4 3 2

YL-KL26Z Document Number

SDA Wednesday, December 25, 2013 1

Rev 1.0 Sheet 1 of 4

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